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The year’s not even a month old and already the CPU market is shaping up for another exciting 12 months for the consumer. Following AMD’s speed bumped Athlon64 3400+ on the 6th January it’s now Intel’s turn to play its hand and introduce the latest incarnation of the Pentium 4 processor, Prescott.
Okay, so we’ve established that there’s a new core with a new name, but what exactly makes a Prescott a Prescott? Well, let’s run through some of the key features and what they mean to you and I.
Prescott is built using the existing NetBurst architecture though it’s created using an advanced 0.09u (90nm) process, which in layman’s terms means Intel has used improved technology to create a significantly smaller die and as a result is able to put the same elements in a much smaller area than was previously possible. This can bring with it several benefits over the existing 0.13u technology in that Intel is able to reduce the core size, which leads to more cores per wafer and thus lower production costs. Alternatively additional features such as extra on-die cache can be added without the core size becoming uneconomically large and expensive to produce. There are other benefits to shrinking the core including lower power consumption and as a rule faster and more predictable performance too.
Although the 0.09u process brings with it all these benefits, Intel has taken further steps to safeguard the future of the Prescott based Pentium 4s and build in a little headroom. These steps include the use of strained silicon and a low-k dielectric material.
So what’s strained silicon then? Inside the core of every CPU are millions of transistors, in Prescott’s case 125 million to be precise. One of the limiting factors that dictates how fast these transistors can switch and therefore how high a frequency a CPU can operate at is the speed at which the individual electrons in the current can transport themselves through the lattice of molecules that make up the silicon. Now, although silicon is a very efficient conductor as it is, engineers discovered that by stretching it (straining it) during the manufacturing process, the constituent molecules could be spread apart slightly making it easier for electrons to barge their way through.
Sounds simple and it is, once the technology has been perfected. The great thing from Intel’s point of view is that the strained silicon process results in around a 10% to 25% improvement in drive current depending on the type of transistor, while adding only about 2% to production costs. Ultimately this allows processors to run at much higher frequencies than could be achieved otherwise.
If you’re a trivia fan, a thousand of the transistors used in Prescott sat side by side would measure approximately the width of a human hair.
So that’s strained silicon, what about this low-k dielectric material business? Well, without getting too scholarly, your CPU is actually created in layers which sit on top of each other, and each of these layers is connected to the one above (or below) using metal connectors known as interconnects. Prescott has seven layers. By the addition of a low-k insulator (carbon-doped oxide (CDO) if you care) between these copper interconnect layers, wire to wire capacitance is reduced and internal signal speeds are increased. This is particularly important as the manufacturing process shrinks because the whole circuitry becomes much denser and more tightly packed which in turn increases the risk of signal leakage and cross talk, definitely not a great idea in a mission critical server. By adding an extra layer (previous P4s had 6), Intel has been able to draw a compromise between die density and manufacturing costs.
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