When running in 64bit mode the Athlon 64 has double the number of general purpose (GP) and Streaming SIMD Extension (SSE) registers. Registers are the most basic of memory stores, present on die and allow programmers to store the most critical of data virtually on the CPU.
Each of the 16 registers is 64bits wide, allowing either larger numbers or memory addresses to be stored.
In compatibility or legacy mode we see the number of registers halve and in the case of the GP registers it drops down to 32bits wide.
The instruction pointer is a register which holds the memory address of the next instruction to be executed and is also 64bits wide. This is how the Athlon 64 is able to address more than 4GB of RAM. Again when running in legacy or compatibility mode this register is only 32bits wide.
Earlier we mentioned that in 64bit mode register extensions would become available. Much like the rest of the processor, AMD has built on top of current addressing schemes so that developers wouldn't be intimidated.
The first 16 bits of data in a register are addressed by 'AX'. To address 32bits of the register 'EAX' is used and to address the full 64bits of the register 'RAX' is used.
If the programmer uses 16 or 32bit data in a 64bit register, the data will be zero-extended to fill the full 64bits. This means that all the bits after the last one (the 33rd for a 32bit value) will be filled with zeros.
One of the main arguments Intel has been making for not moving over to 64bit processors on the desktop is that no one will require more than the 4GB of RAM that is currently supported by 32bit processors.
The Athlon 64 (and Opteron) will initially support 48bit memory addressing which means the current limit with RAM is four petabytes (4,000 Gigabytes).
The key to AMD64's design is familiarity. AMD needs to make sure that developers aren't driven away by having to re-learn assembler or other development tools that have all new quirks and caveats. Bypassing a sharp learning curve for developers should result in a flurry of AMD64 optimised applications appearing soon after launch.
The other key technology is HyperTransport. Contrary to popular belief, HyperTransport wasn't designed solely by AMD but by a consortium of which AMD is a party to.
The HyperTransport bus is designed for all aspects of the computer market, from network appliances such as switches and routers to desktop computing. It is the latter where undoubtedly HyperTransport will make its indelible mark.
Already being used in Appleâ€™s latest Macintosh G5 the HyperTransport bus marks a departure from current designs through it's use of low bandwidth, low power consumption links.
The raw characteristics of HyperTransport are very impressive. With maximum throughput at 12.8GB/sec there is more than enough bandwidth present for it's target applications today and tomorrow.
Available in five "widths", two, four, eight, 16 and 32 bits it gives AMD the ability to increase the bandwidth of the HyperTransport bus in later revisions of the Athlon 64 resulting in an increase in overall system performance.
In order to overcome the low bandwidth, the bus is synchronized to a very fast clock which is running at 800MHz. It is also capable of DDR memory timing, thus in effect doubling that figure to 1.6GHz. This means that even at its lowest bandwidth (2bit) it can transfer 400MB/sec and a 32bit link can shift 6.4GB/sec per pin pair.
Taking the example of a high-bandwidth bus, like the popular PCI bus we find that the most common implementation is 32bit which runs at 33MHz and provides 132MB/sec of throughput. So although the PCI bus is wider, a 2bit HyperTransport bus is able to transfer more data per second.
Instead of sending a high or low voltage signal down the wire, HyperTransport uses pairs of wires and the signal is a calculation of the difference in the two wires.
The advantage of this is that the likelihood of bouncing signals, interference or cross-talk is greatly reduced. Further advantages include the ability to support up to 32 devices and backward compatibility with older buses like PCI. There is even support for the yet-to-be-released PCI Express bus through the use of tunnels and bridges.
The schematic diagram, apart from the memory interfacing directly with the CPU, looks much like any current x86 desktop computer. The HyperTransport Tunnel provides an interface with the AGP graphics slot. The HyperTransport I/O Hub provides an interface to other buses like USB, IDE and PCI similar to a "Southbridge" controller found on most motherboards today.
HyperTransport is also one of the key differences between an Opteron processor and an Athlon 64. Whereas an Opteron CPU has three HyperTransport links to enable multiprocessing, an Athlon 64 only has one.
While cutting down the number of HyperTransport links may appear to severely degrade performance, what one should really worry about is the bandwidth of the HyperTransport link that remains. We believe the single HyperTransport will remain exactly the same as seen on the Opteron. The two links that will be removed are done so to stop Athlon 64 chips being used in multiprocessor environments.
Even though HyperTransport may be a fast bus, its implementation was dependant on how easy it was for component manufacturers to adopt it.
Garnering the support of motherboard manufacturers like Asus, MSI and Gigabyte, AMD seems to have overcome that potential problem and created wide industry support for its new CPU.
The Athlon 64 is a new processor which brings more than just extra speed to the computer world. It encompasses greater functionality and the ability for users to upgrade their operating systems and applications in their own time.
AMD64 architecture is designed to be easy on consumers, developers and integrators; all areas where AMD needs support to make the Athlon 64 successful. The ability to run 32bit programs is key since there is no question that it will take a while for the world to become 64bit.
Unlike the Pentium Pro before it, the Athlon 64 should be a great chip for now and tomorrow. A CPU that can grow with the software that runs on it and eventually show off its true colours.