Toshiba Preps Tech For 100Gbit NAND Chips

Dreams of today become realities of tomorrow.

SSDs come with superfantabulous benefits which we all recognise and love, but capacity isn’t yet one of them…

Aiming to fix this is Toshiba which has this week shown off a ‘new double tunneling (sic) layer technology’ which it will use in future 10nm flash memories (due within four generations, read: four years). The breakthrough will open the door for devices with densities beyond 100 gigabits (12.5GB) – a vast improvement on the 16 gigabit modules available today.

As you might expect, the science behind this is frightening and I won’t even begin to try and understand it so here is some blatant copy and paste:

“Toshiba developed a tunnel layer, which controls in and out of electron, in the SONOS (Silicon Oxide Nitride Oxide Semiconductor) type device structure, a memory structure that holds electrons in the nitride layer in the gate insulator. The new structure sandwiches a 1.2 nm silicon nanocrystals layer between the 1nm thickness oxide films, achieving long-time data retention and high speed writing and data deletion at the same time, using the natural characteristic that resistance changes with changes in gate voltage. As the new tunnel layers are thinner than early version SONOS element tunnel layers, it is easier to migrate to advanced devices with finer lithography.

Toshiba also increased the saved electrons amount by changing the nitride film from Si3N4 to Si9N10, a material that contains more silicon, and optimized such aspects of the element structure as channel impurity concentration. The prototype has realized and maintained equivalent to over 10 years performance.”

I suspect a degree containing the letters ‘MSc’ or ‘PhD’ may be required to garner full understanding of what is written above, but I certainly can compute the benefits in laymen’s terms:

Vastly bigger, faster SSDs! Woo Hoo!

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